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1. general description the 74lvc2g66 is a low-power, low-voltage, high-speed si-gate cmos device. the 74lvc2g66 provides two single pole, single-throw analog switch functions. each switch has two input/output terminals (ny and nz) and an active high enable input (ne). when ne is low, the analog switch is turned off. schmitt-trigger action at the enable inputs makes the circuit tolerant of slower input rise and fall times across the entire v cc range from 1.65 v to 5.5 v. 2. features n wide supply voltage range from 1.65 v to 5.5 v n very low on resistance: u 7.5 w (typical) at v cc = 2.7 v u 6.5 w (typical) at v cc = 3.3 v u 6 w (typical) at v cc =5v n switch current capability of 32 ma n high noise immunity n cmos low power consumption n ttl interface compatibility at 3.3 v n latch-up performance meets requirements of jesd78 class i n esd protection: u hbm jesd22-a114e exceeds 2000 v u mm jesd22-a115-a exceeds 200 v n enable input accepts voltages up to 5.5 v n multiple package options n speci?ed from - 40 cto+85 c and - 40 c to +125 c 74lvc2g66 bilateral switch rev. 04 1 july 2008 product data sheet
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 2 of 24 nxp semiconductors 74lvc2g66 bilateral switch 3. ordering information 4. marking 5. functional diagram table 1. ordering information type number package temperature range name description version 74lvc2g66dp - 40 c to +125 c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74lvc2g66dc - 40 c to +125 c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 74lvc2g66gt - 40 c to +125 c xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm sot833-1 74lvc2g66gd - 40 c to +125 c xson8u plastic extremely thin small outline package; no leads; 8 terminals; utlp based; body 3 2 0.5 mm sot996-2 74lvc2g66gm - 40 c to +125 c xqfn8u plastic extremely thin quad ?at package; no leads; 8 terminals; utlp based; body 1.6 1.6 0.5 mm sot902-1 table 2. marking codes type number marking code 74lvc2g66dp v66 74lvc2g66dc v66 74lvc2g66gt v66 74lvc2g66gd v66 74lvc2g66gm v66 fig 1. logic symbol fig 2. iec logic symbol 001aah807 001aah808 1 1 x1 1 1 x1 # #
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 3 of 24 nxp semiconductors 74lvc2g66 bilateral switch 6. pinning information 6.1 pinning fig 3. logic diagram (one switch) mna658 v cc e y z fig 4. pin con?guration sot505-2 (tssop8) and sot765-1 (vssop8) fig 5. pin con?guration sot833-1 (xson8) 74lvc2g66 1y v cc 1z 1e 2e 2z gnd 2y 001aaa529 1 2 3 4 6 5 8 7 74lvc2g66 2z 1e v cc 2y 2e 1z 1y gnd 001aaf567 36 27 18 45 transparent top view fig 6. pin con?guration sot996-2 (xson8u) fig 7. pin con?guration sot902-1 (xqfn8u) 001aai248 74lvc2g66 transparent top view 8 7 6 5 1 2 3 4 1y 1z 2e gnd v cc 1e 2z 2y 001aaf568 1z 2z 1y v cc 2e 1e gnd 2y transparent top view 3 6 4 1 5 8 7 2 terminal 1 index area 74lvc2g66
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 4 of 24 nxp semiconductors 74lvc2g66 bilateral switch 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level. 8. limiting values [1] the minimum input voltage rating may be exceeded if the input current rating is observed. [2] the minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed. [3] for tssop8 package: above 55 c the value of p tot derates linearly with 2.5 mw/k. for vssop8 package: above 110 c the value of p tot derates linearly with 8 mw/k. for xson8, xson8u and xqfn8u packages: above 45 c the value of p tot derates linearly with 2.4 mw/k. table 3. pin description symbol pin description sot505-2, sot765-1, sot833-1 and sot996-2 sot902-1 1y 1 7 independent input or output 1z 2 6 independent input or output 2e 3 5 enable input (active high) gnd 4 4 ground (0 v) 2y 5 3 independent input or output 2z 6 2 independent input or output 1e 7 1 enable input (active high) v cc 8 8 supply voltage table 4. function table [1] input ne switch l off-state h on-state table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +6.5 v v i input voltage [1] - 0.5 +6.5 v i ik input clamping current v i < - 0.5 v or v i >v cc + 0.5 v - 50 - ma i sk switch clamping current v i < - 0.5 v or v i >v cc + 0.5 v - 50 ma v sw switch voltage enable and disable mode [2] - 0.5 v cc + 0.5 v i sw switch current v sw > - 0.5 v or v sw 74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 5 of 24 nxp semiconductors 74lvc2g66 bilateral switch 9. recommended operating conditions [1] to avoid sinking gnd current from terminal nz when switch current ?ows in terminal ny, the voltage drop across the bidirectional switch must not exceed 0.4 v. if the switch current ?ows into terminal nz, no gnd current will ?ow from terminal ny. in this case, there is no limit for the voltage drop across the switch. [2] for overvoltage tolerant switch voltage capability, refer to 74lvcv2g66. [3] applies to control signal levels. 10. static characteristics table 6. operating conditions symbol parameter conditions min max unit v cc supply voltage 1.65 5.5 v v i input voltage 0 5.5 v v sw switch voltage [1] [2] 0v cc v t amb ambient temperature - 40 +125 c d t/ d v input transition rise and fall rate v cc = 1.65 v to 2.7 v [3] - 20 ns/v v cc = 2.7 v to 5.5 v [3] - 10 ns/v table 7. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v ih high-level input voltage v cc = 1.65 v to 1.95 v 0.65 v cc - - 0.65 v cc -v v cc = 2.3 v to 2.7 v 1.7 - - 1.7 - v v cc = 2.7 v to 3.6 v 2.0 - - 2.0 - v v cc = 4.5 v to 5.5 v 0.7 v cc - - 0.7 v cc -v v il low-level input voltage v cc = 1.65 v to 1.95 v - - 0.35 v cc - 0.35 v cc v v cc = 2.3 v to 2.7 v - - 0.7 - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3 v cc - 0.3 v cc v i i input leakage current pin ne; v i = 5.5 v or gnd; v cc = 0 v to 5.5 v [2] - 0.1 5- 100 m a i s(off) off-state leakage current v i =v ih or v il ; v cc = 5.5 v; see figure 8 [2] - 0.1 5- 200 m a i s(on) on-state leakage current v i =v ih or v il ; v cc = 5.5 v; see figure 9 [2] - 0.1 5- 200 m a i cc supply current v i = 5.5 v or gnd; v sw = gnd or v cc ; i o =0a; v cc = 1.65 v to 5.5 v [2] - 0.1 10 - 200 m a d i cc additional supply current pin ne; v i =v cc - 0.6 v; v sw = gnd or v cc ; i o = 0 a; v cc = 5.5 v [2] - 5 500 - 5000 m a
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 6 of 24 nxp semiconductors 74lvc2g66 bilateral switch [1] all typical values are measured at t amb =25 c. [2] these typical values are measured at v cc = 3.3 v. 10.1 test circuits c i input capacitance - 2.0 - - - pf c s(off) off-state capacitance - 5.0 - - - pf c s(on) on-state capacitance - 9.5 - - - pf table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max v i = v cc or gnd and v o = gnd or v cc .v i = v cc or gnd and v o = open circuit. fig 8. test circuit for measuring off-state leakage current fig 9. test circuit for measuring on-state leakage current 001aag488 i s i s v i v il v o v cc gnd y z e 001aag489 i s v i v ih v o v cc gnd y z e
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 7 of 24 nxp semiconductors 74lvc2g66 bilateral switch 10.2 on resistance [1] typical values are measured at t amb =25 c and nominal v cc . [2] flatness is de?ned as the difference between the maximum and minimum value of on resistance measured at identical v cc and temperature. table 8. on resistance at recommended operating conditions; voltages are referenced to gnd (ground 0 v); for graphs see figure 11 to figure 16 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max r on(peak) on resistance (peak) v i = gnd to v cc ; see figure 10 i sw = 4 ma; v cc = 1.65 v to 1.95 v - 34.0 130 - 195 w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 12.0 30 - 45 w i sw = 12 ma; v cc = 2.7 v - 10.4 25 - 38 w i sw = 24 ma; v cc = 3.0 v to 3.6 v - 7.8 20 - 30 w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 6.2 15 - 23 w r on(rail) on resistance (rail) v i = gnd; see figure 10 i sw = 4 ma; v cc = 1.65 v to 1.95 v - 8.2 18 - 27 w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 7.1 16 - 24 w i sw = 12 ma; v cc = 2.7 v - 6.9 14 - 21 w i sw = 24 ma; v cc = 3.0 v to 3.6 v - 6.5 12 - 18 w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 5.8 10 - 15 w v i =v cc ; see figure 10 i sw = 4 ma; v cc = 1.65 v to 1.95 v - 10.4 30 - 45 w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 7.6 20 - 30 w i sw = 12 ma; v cc = 2.7 v - 7.0 18 - 27 w i sw = 24 ma; v cc = 3.0 v to 3.6 v - 6.1 15 - 23 w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 4.9 10 - 15 w r on(?at) on resistance (?atness) v i = gnd to v cc [2] i sw = 4 ma; v cc = 1.65 v to 1.95 v - 26.0 - - - w i sw = 8 ma; v cc = 2.3 v to 2.7 v - 5.0 - - - w i sw = 12 ma; v cc = 2.7 v - 3.5 - - - w i sw = 24 ma; v cc = 3.0 v to 3.6 v - 2.0 - - - w i sw = 32 ma; v cc = 4.5 v to 5.5 v - 1.5 - - - w
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 8 of 24 nxp semiconductors 74lvc2g66 bilateral switch 10.3 on resistance test circuit and graphs r on =v sw /i sw . (1) v cc = 1.8 v. (2) v cc = 2.5 v. (3) v cc = 2.7 v. (4) v cc = 3.3 v. (5) v cc = 5.0 v. fig 10. test circuit for measuring on resistance fig 11. typical on resistance as a function of input voltage; t amb = 25 c 001aag490 v i v ih v cc gnd z y e v sw i sw v i (v) 05 4 23 1 mna673 20 10 30 40 r on ( w ) 0 (1) (2) (3) (4) (5) (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. fig 12. on resistance as a function of input voltage; v cc = 1.8 v fig 13. on resistance as a function of input voltage; v cc = 2.5 v v i (v) 0 2.0 1.6 0.8 1.2 0.4 001aaa712 25 35 15 45 55 r on ( w ) 5 (4) (3) (2) (1) v i (v) 0 2.5 2.0 1.0 1.5 0.5 001aaa708 9 11 7 13 15 r on ( w ) 5 (1) (2) (3) (4)
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 9 of 24 nxp semiconductors 74lvc2g66 bilateral switch (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. fig 14. on resistance as a function of input voltage; v cc = 2.7 v fig 15. on resistance as a function of input voltage; v cc = 3.3 v 001aaa709 v i (v) 0 3.0 2.0 1.0 2.5 1.5 0.5 9 7 11 13 r on ( w ) 5 (1) (2) (3) (4) v i (v) 04 3 12 001aaa710 6 8 10 r on ( w ) 4 (1) (2) (3) (4) (1) t amb = 125 c. (2) t amb =85 c. (3) t amb =25 c. (4) t amb = - 40 c. fig 16. on resistance as a function of input voltage; v cc = 5.0 v v i (v) 05 4 23 1 001aaa711 5 4 6 7 r on ( w ) 3 (2) (4) (1) (3)
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 10 of 24 nxp semiconductors 74lvc2g66 bilateral switch 11. dynamic characteristics [1] typical values are measured at t amb =25 c and nominal v cc . [2] t pd is the same as t plh and t phl . [3] propagation delay is the calculated rc time constant of the typical on resistance of the switch and the speci?ed capacitance when driven by an ideal voltage source (zero output impedance). [4] t en is the same as t pzh and t pzl . [5] t dis is the same as t plz and t phz . [6] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s {(c l +c s(on) ) v cc 2 f o } where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; c s(on) = maximum on-state switch capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s {(c l +c s(on) ) v cc 2 f o } = sum of the outputs. table 9. dynamic characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); for test circuit see figure 19 . symbol parameter conditions - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max t pd propagation delay ny to nz or nz to ny; see figure 17 [2] [3] v cc = 1.65 v to 1.95 v - 0.8 2.0 - 3.0 ns v cc = 2.3 v to 2.7 v - 0.4 1.2 - 2.0 ns v cc = 2.7 v - 0.4 1.0 - 1.5 ns v cc = 3.0 v to 3.6 v - 0.3 0.8 - 1.5 ns v cc = 4.5 v to 5.5 v - 0.2 0.6 - 1.0 ns t en enable time ne to ny or nz; see figure 18 [4] v cc = 1.65 v to 1.95 v 1.0 4.6 10 1.0 13.0 ns v cc = 2.3 v to 2.7 v 1.0 2.7 5.6 1.0 7.5 ns v cc = 2.7 v 1.0 2.7 5.0 1.0 6.5 ns v cc = 3.0 v to 3.6 v 1.0 2.4 4.4 1.0 6.0 ns v cc = 4.5 v to 5.5 v 1.0 1.8 3.9 1.0 5.0 ns t dis disable time e to y or z; see figure 18 [5] v cc = 1.65 v to 1.95 v 1.0 3.8 9.0 1.0 11.5 ns v cc = 2.3 v to 2.7 v 1.0 2.1 5.5 1.0 7.0 ns v cc = 2.7 v 1.0 3.5 6.5 1.0 8.5 ns v cc = 3.0 v to 3.6 v 1.0 3.0 6.0 1.0 8.0 ns v cc = 4.5 v to 5.5 v 1.0 2.2 5.0 1.0 6.5 ns c pd power dissipation capacitance c l = 50 pf; f i = 10 mhz; v i = gnd to v cc [6] v cc = 2.5 v - 9.0 - - - pf v cc = 3.3 v - 11.0 - - - pf v cc = 5.0 v - 15.7 - - - pf
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 11 of 24 nxp semiconductors 74lvc2g66 bilateral switch 11.1 waveforms and test circuit measurement points are given in t ab le 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 17. input (ny or nz) to output (nz or ny) propagation delays 001aaa541 t plh t phl v m v m v m v m ny or nz input nz or ny output gnd v i v oh v ol measurement points are given in t ab le 10 . logic levels: v ol and v oh are typical output voltage levels that occur with the output load. fig 18. enable and disable times 001aaa542 t plz t phz switch disabled switch enabled switch enabled output low-to-off off-to-low output high-to-off off-to-high ne input ny or nz ny or nz v i v ol v oh v cc v m v m v x v y v m gnd gnd t pzl t pzh table 10. measurement points supply voltage input output v cc v m v m v x v y 1.65 v to 1.95 v 0.5 v cc 0.5 v cc v ol + 0.15 v v oh - 0.15 v 2.3 v to 2.7 v 0.5 v cc 0.5 v cc v ol + 0.15 v v oh - 0.15 v 2.7 v 1.5 v 1.5 v v ol + 0.3 v v oh - 0.3 v 3.0 v to 3.6 v 1.5 v 1.5 v v ol + 0.3 v v oh - 0.3 v 4.5 v to 5.5 v 0.5 v cc 0.5 v cc v ol + 0.3 v v oh - 0.3 v
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 12 of 24 nxp semiconductors 74lvc2g66 bilateral switch 11.2 additional dynamic characteristics test data is given in t ab le 11 . de?nitions test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. r l = load resistance. v ext = external voltage for measuring switching times. fig 19. test circuit for measuring switching times v ext v cc v i v o mna616 dut c l r t r l r l g table 11. test data supply voltage input load v ext v cc v i t r , t f c l r l t plh, t phl t pzh, t phz t pzl, t plz 1.65 v to 1.95 v v cc 2.0 ns 30 pf 1 k w open gnd 2 v cc 2.3 v to 2.7 v v cc 2.0 ns 30 pf 500 w open gnd 2 v cc 2.7 v 2.7 v 2.5 ns 50 pf 500 w open gnd 6 v 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 w open gnd 6 v 4.5 v to 5.5 v v cc 2.5 ns 50 pf 500 w open gnd 2 v cc table 12. additional dynamic characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); t amb =25 c. symbol parameter conditions min typ max unit thd total harmonic distortion r l =10k w ; c l = 50 pf; f i = 1 khz; see figure 20 v cc = 1.65 v - 0.032 - % v cc = 2.3 v - 0.008 - % v cc = 3.0 v - 0.006 - % v cc = 4.5 v - 0.005 - % r l =10k w ; c l = 50 pf; f i = 10 khz; see figure 20 v cc = 1.65 v - 0.068 - % v cc = 2.3 v - 0.009 - % v cc = 3.0 v - 0.008 - % v cc = 4.5 v - 0.006 - %
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 13 of 24 nxp semiconductors 74lvc2g66 bilateral switch f (-3db) - 3 db frequency response r l = 600 w ; c l = 50 pf; see figure 21 v cc = 1.65 v - 135 - mhz v cc = 2.3 v - 145 - mhz v cc = 3.0 v - 150 - mhz v cc = 4.5 v - 155 - mhz r l =50 w ; c l = 10 pf; see figure 21 v cc = 1.65 v - 200 - mhz v cc = 2.3 v - 350 - mhz v cc = 3.0 v - 410 - mhz v cc = 4.5 v - 440 - mhz r l =50 w ; c l = 5 pf; see figure 21 v cc = 1.65 v - > 500 - mhz v cc = 2.3 v - > 500 - mhz v cc = 3.0 v - > 500 - mhz v cc = 4.5 v - > 500 - mhz a iso isolation (off-state) r l = 600 w ; c l = 50 pf; f i = 1 mhz; see figure 22 v cc = 1.65 v - - 46 - db v cc = 2.3 v - - 46 - db v cc = 3.0 v - - 46 - db v cc = 4.5 v - - 46 - db r l =50 w ; c l = 5 pf; f i = 1 mhz; see figure 22 v cc = 1.65 v - - 37 - db v cc = 2.3 v - - 37 - db v cc = 3.0 v - - 37 - db v cc = 4.5 v - - 37 - db v ct crosstalk voltage between digital inputs and switch; r l = 600 w ; c l = 50 pf; f i = 1 mhz; t r =t f = 2 ns; see figure 23 v cc = 1.65 v - - - mv v cc = 2.3 v - 91 - mv v cc = 3.0 v - 119 - mv v cc = 4.5 v - 205 - mv table 12. additional dynamic characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); t amb =25 c. symbol parameter conditions min typ max unit
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 14 of 24 nxp semiconductors 74lvc2g66 bilateral switch 11.3 test circuits xtalk crosstalk between switches; r l = 600 w ; c l =50pf; f i = 1 mhz; see figure 24 v cc = 1.65 v - - - db v cc = 2.3 v - - 56 - db v cc =3v - - 56 - db v cc = 4.5 v - - 56 - db between switches; r l =50 w ; c l = 5 pf; f i = 1 mhz; see figure 24 v cc = 1.65 v - - - db v cc = 2.3 v - - 29 - db v cc =3v - - 28 - db v cc = 4.5 v - - 28 - db q inj charge injection c l = 0.1 nf; v gen =0v; r gen =0 w ; f i = 1 mhz; r l =1m w ; see figure 25 v cc = 1.8 v - 3.3 - pc v cc = 2.5 v - 4.1 - pc v cc = 3.3 v - 5.0 - pc v cc = 4.5 v - 6.4 - pc v cc = 5.5 v - 7.5 - pc table 12. additional dynamic characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v); t amb =25 c. symbol parameter conditions min typ max unit test conditions: v cc = 1.65 v: v i = 1.4 v (p-p). v cc = 2.3 v: v i = 2 v (p-p). v cc = 3 v: v i = 2.5 v (p-p). v cc = 4.5 v: v i = 4 v (p-p). fig 20. test circuit for measuring total harmonic distortion 001aag492 v ih v o v cc 0.5v cc z/y y/z e 600 w f i r l 10 pf c l d
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 15 of 24 nxp semiconductors 74lvc2g66 bilateral switch adjust f i voltage to obtain 0 dbm level at output. increase f i frequency until db meter reads - 3db. fig 21. test circuit for measuring the frequency response when switch is in on-state 001aag491 v ih v o v cc 0.5v cc z/y y/z e 50 w f i r l 0.1 m f c l db adjust f i voltage to obtain 0 dbm level at input. fig 22. test circuit for measuring isolation (off-state) 001aag493 v il v o v cc 0.5v cc z/y y/z e 50 w f i r l 0.5v cc r l 0.1 m f c l db fig 23. test circuit for measuring crosstalk voltage (between digital inputs and switch) 001aag494 v o v cc 0.5v cc z/y y/z e 50 w 600 w logic input r l 0.5v cc c l g
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 16 of 24 nxp semiconductors 74lvc2g66 bilateral switch 20 log 10 (v o2 / v o1 ) or 20 log 10 (v o1 / v o2 ). fig 24. test circuit for measuring crosstalk between switches 001aag496 v ih 0.5v cc 1z or 1y 1y or 1z channel on 1e 50 w 600 w f i r l r i 0.1 m f c l 50 pf v o1 v il 0.5v cc 2z or 2y 2y or 2z channel off 2e r l r i 600 w c l 50 pf v o2 a. test circuit b. input and output pulse de?nitions q inj = d v o c l . d v o = output voltage variation. r gen = generator resistance. v gen = generator voltage. fig 25. test circuit for measuring charge injection 001aag495 v o v cc z/y y/z e logic input r l 1 m w r gen c l 0.1 nf v gen g mna675 on off logic input (e) v o off d v o
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 17 of 24 nxp semiconductors 74lvc2g66 bilateral switch 12. package outline fig 26. package outline sot505-2 (tssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (1) z (1) q references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.95 0.75 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.70 0.35 8 0 0.13 0.1 0.2 0.5 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.47 0.33 sot505-2 - - - 02-01-16 w m b p d z e 0.25 14 8 5 q a 2 a 1 l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 1.1 pin 1 index
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 18 of 24 nxp semiconductors 74lvc2g66 bilateral switch fig 27. package outline sot765-1 (vssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (2) z (1) q references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 0 0.13 0.1 0.2 0.4 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 q 0.21 0.19 sot765-1 mo-187 02-06-07 w m b p d z e 0.12 14 8 5 q a 2 a 1 q l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale vssop8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 1 pin 1 index
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 19 of 24 nxp semiconductors 74lvc2g66 bilateral switch fig 28. package outline sot833-1 (xson8) terminal 1 index area references outline version european projection issue date iec jedec jeita sot833-1 - - - mo-252 - - - sot833-1 07-11-14 07-12-07 dimensions (mm are the original dimensions) xson8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 2.0 1.9 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 8 2 7 3 6 4 5 8 (2) 4 (2) a
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 20 of 24 nxp semiconductors 74lvc2g66 bilateral switch fig 29. package outline sot996-2 (xson8u) references outline version european projection issue date iec jedec jeita sot996-2 - - - - - - sot996-2 07-12-18 07-12-21 unit a max mm 0.5 0.05 0.00 0.35 0.15 3.1 2.9 0.5 1.5 0.5 0.3 0.6 0.4 0.1 0.05 a 1 dimensions (mm are the original dimensions) xson8u: plastic extremely thin small outline package; no leads; 8 terminals; utlp based; body 3 x 2 x 0.5 mm 0 1 2 mm scale b d 2.1 1.9 e e e 1 l l 1 0.15 0.05 l 2 v w 0.05 y y 1 0.1 c y c y 1 x b 14 85 e 1 e a c b v m c w m l 2 l 1 l terminal 1 index area b a d e detail x a a 1
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 21 of 24 nxp semiconductors 74lvc2g66 bilateral switch fig 30. package outline sot902-1 (xqfn8u) references outline version european projection issue date iec jedec jeita sot902-1 mo-255 - - - - - - sot902-1 05-11-25 07-11-14 unit a max mm 0.5 a 1 0.25 0.15 0.05 0.00 1.65 1.55 0.35 0.25 0.15 0.05 dimensions (mm are the original dimensions) xqfn8u: plastic extremely thin quad flat package; no leads; 8 terminals; utlp based; body 1.6 x 1.6 x 0.5 mm b dl e 1 1.65 1.55 e e l 1 v 0.1 0.55 0.5 w 0.05 y 0.05 0.05 y 1 0 1 2 mm scale x c y c y 1 terminal 1 index area terminal 1 index area b a d e detail x a a 1 b 8 7 6 5 e 1 e 1 e e a c b ? v m c ? w m 4 1 2 3 l l 1 metal area not for soldering
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 22 of 24 nxp semiconductors 74lvc2g66 bilateral switch 13. abbreviations 14. revision history table 13. abbreviations acronym description cmos complementary metal-oxide semiconductor ttl transistor-transistor logic hbm human body model esd electrostatic discharge mm machine model dut device under test table 14. revision history document id release date data sheet status change notice supersedes 74lvc2g66_4 20080701 product data sheet - 74lvc2g66_3 modi?cations: ? section 8 : derating factor for tssop8 package corrected. ? added type number 74lvc2g66gd (xson8u package). 74lvc2g66_3 20080310 product data sheet - 74lvc2g66_2 74lvc2g66_2 20070828 product data sheet - 74lvc2g66_1 74lvc2g66_1 20040629 product data sheet - -
74lvc2g66_4 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 04 1 july 2008 23 of 24 nxp semiconductors 74lvc2g66 bilateral switch 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74lvc2g66 bilateral switch ? nxp b.v. 2008. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 1 july 2008 document identifier: 74lvc2g66_4 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 4 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 5 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10.1 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 10.2 on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 7 10.3 on resistance test circuit and graphs. . . . . . . . 8 11 dynamic characteristics . . . . . . . . . . . . . . . . . 10 11.1 waveforms and test circuit . . . . . . . . . . . . . . . 11 11.2 additional dynamic characteristics . . . . . . . . . 12 11.3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 23 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 16 contact information. . . . . . . . . . . . . . . . . . . . . 23 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

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